1. Field of the Invention
The present invention relates to semiconductor devices and methods of manufacturing the semiconductor devices as well as methods of forming resist patterns and exposure systems used therefor. The invention more particularly relates to semiconductor devices achieving higher integration without deterioration in electrical characteristics thereof and methods of manufacturing the semiconductor devices, as well as methods of forming resist patterns and exposure systems used therefor.
2. Description of the Background Art
Demand for reduced scale and increased integration of semiconductor devices represented by the semiconductor memory device or the like is increasing nowadays. In order to attain such decrease and improvement in scale and integration respectively, the semiconductor has a spacing between interconnection lines that is approximately equal to or smaller than the wavelength of exposure light for the photolithography process in the step of fabricating the interconnection lines. If a through hole is formed in an interlayer insulating film such that the hole is located between the interconnection lines without contacting with the interconnection lines, the through hole should have its diameter smaller than the distance between the interconnection lines. In other words, the through hole having its diameter smaller than the wavelength of the exposure light must be made. For example, if KrF excimer laser (wavelength 248 nm) is employed as the exposure light, a through hole with a diameter of about 200 nm is required. If i-ray (wavelength 365 nm) is employed, a through hole with a diameter of about 300 nm is required.
The through hole is used for electrically connecting an underlying conductive region and an overlying interconnection line. The overlying interconnection line should be formed to overlap the through hole. However. considering the overlay accuracy of a photolithography used for forming the overlying interconnection line, the diameter of the through hole preferably has a size defined by taking it into account at least the width and the margin (tolerance) of pattern position accuracy of the overlying a interconnection line, in order to superimposing the overlying interconnection line surely on the through hole. The through hole then needs the diameter significantly greater than the wavelength of the exposure light.
A semiconductor device as shown in FIG. 21 has a structure which satisfies the two requirements above, for example. FIG. 21 is a plan view illustrating the semiconductor device associated with the present invention.
Referring to FIG. 21, lower-level interconnection lines 115a to 115e such as gate electrodes are formed on a semiconductor substrate (not shown). A conductive region (not shown) is formed between lower-level interconnection lines 115a to 115e at a main surface of the semiconductor substrate. An interlayer insulating film (not shown) is formed on lowerlevel interconnection lines 115a to 115e. Contact holes 116a to 116f are formed in the interlayer insulating film in a region between lower-level interconnection lines 115b and 115c and a region between lower-level interconnection lines 115d and 115e. Upper-level interconnection lines 117a to 117c are formed on the interlayer insulating film and in contact holes 116a to 116f extending in a direction almost. perpendicular to the direction in which lower-level interconnection lines 115a to 115e extend.
The spacing between lower-level interconnection lines 115a to 115e is approximately equal to or smaller than the wavelength of exposure light used for generating lower-level interconnection lines 115a to 115e. Considering this, the shortest, distance across each of contact holes 116a to 116f (minor axis) should be smaller than the wavelength of the exposure light.
Preferably, the longest distance across contact holes 116a to 116f each (major axis) is greater than the combined length of the line width of upper-level interconnection lines 117a to 117c each and a margin of pattern position accuracy xcex94M. This arrangement is made for surely making contact between upper-level interconnection lines 117a to 117c and the conductive region on the semiconductor substrate via contact holes 116a to 116f even if the positions of upper-level interconnection lines 117a to 117c change due to varying factors in manufacture such as an overlay error of a mask.
A mask pattern illustrated in FIG. 22 is used for making such contact holes 116a to 116f. FIG. 22 illustrates the mask pattern used for generating contact holes 116a to 116f shown in FIG. 21.
Referring to FIG. 22, a mask pattern 110 is generated at a lightblocking film 109. Mask pattern 110 has a width Wm4 and a height Hm4. If mask pattern 110 is for a reduction exposure step using a stepper, the size of mask pattern 110 is about five times larger than that of a resist pattern formed at a resist film on the semiconductor substrate. For an exposure system such as a scan type having a different reduction ratio of 4 to 1, the size of the mask pattern is about four times larger than, or inverse of the reduction ratio times larger than that of the resist pattern.
FIG. 23 illustrates a resist pattern to be formed by using the mask pattern shown in FIG. 22. Referring to FIG. 23, a resist pattern 112a having a width W3 and a height H3 is formed at a resist film 11.
If resist pattern 112a to be formed has the width W3 which is sufficiently greater than the wavelength of the exposure light, the ratio between the width W3 and height H3 of resist pattern 112a is almost close to the ratio between the width Wm4 and the height Hm4 of mask pattern 110 shown in FIG. 22. Accordingly, resist pattern 112a similar to an ellipse as shown in FIG. 23 is obtained. Referring again to FIG. 23, if the distance HS between resist pattern 112a to be formed and another resist pattern adjacent thereto is sufficiently greater than the wavelength of the exposure light, the shape, size, position and the like of resist pattern 112a can easily be corrected.
However, if the width W3 of resist pattern 112a to be formed is smaller than the wavelength of the exposure light, the ratio of a height H4 to a width W4 of a resist pattern 112b is smaller than the ratio of the height Hm4 to the width Wm4 of mask pattern 110 of the mask used for the exposure step as shown in FIG. 24. As a result, the two-dimensional shape of thus obtained resist pattern 112b becomes similar to a circle as shown in FIG. 24. FIG. 24 illustrates the resist pattern generated by using the mask pattern shown in FIG. 22 when the shortest distance across the resist pattern is smaller than the wavelength of the exposure light.
In such a case, resist pattern 112a as shown in FIG. 23 is not obtained. and accordingly, it is difficult to form contact holes 116a to 116f each having the sufficient longest distance across the contact hole. When upper-level interconnection lines 117a to 117c are formed, if the longest distance across contact holes 116a to 116f each is not enough, the positions of upper-level interconnection lines 117a to 117c and of contact holes 116a to 116f could not match.
A problem consequently arises is that electrical connection of the conductive region on the semiconductor substrate with upper-level interconnection lines 117a to 117c is impossible. This problem causes deterioration of electrical characteristics of the semiconductor device. For example, a circuit in the semiconductor device does not operate correctly. A problem thus generated is reduction in the yield of the semiconductor device.
In order to avoid decrease in the height H4 of resist pattern 112b as shown in FIG. 24, a mask pattern shown in FIG. 25 can be used. FIG. 25 illustrates another mask pattern associated with the present invention. Referring to FIG. 25, a mask pattern 110a has its height Hm5 greater than the height Hm4 of mask pattern 110 in FIG. 22. However, even if the mask pattern as shown in FIG. 25 is used, resist patterns adjacent to each other are connected via a joint 140 to generate a large resist pattern 112c as shown in FIG. 26 when contact holes 116a to 116f are to be produced to be adjacent to each other as shown in FIG. 21. In other words, if the distance HS between resist pattern 112a (see FIG. 23) to be formed and another resist pattern adjacent thereto is smaller than the wavelength of the exposure light, resist pattern 112c as shown in FIG. 26 is consequently produced, leading to difficulty in making fine adjustment to the shape, position, and the like of the resist pattern. FIG. 26 illustrates the resist pattern generated by using the mask pattern shown in FIG. 25.
It is still difficult to make contact holes 116a to 116f illustrated in FIG. 21 by increasing the height Hm5 of the mask pattern as shown in FIG. 25.
As heretofore described, the conventional method of forming a resist pattern has difficulty in forming a resist pattern having the shortest distance which is smaller than the wavelength of exposure light and the longest distance which is greater than the wavelength of exposure light. Therefore, to generate such contact holes 116a to 116c as illustrated in FIG. 21 is difficult.
Further, the demand for enhanced integration and smaller scale of a semiconductor device requires that, not only the contact hole but a conductive region 135 formed at the main surface of the semiconductor substrate, as shown in FIG. 27, has a two-dimensional shape with its height H5 smaller than the wavelength of exposure light used for generating conductive region 135, and its width W5 sufficiently greater than the exposure light. FIG. 27 is a plan view illustrating a semiconductor device associated with the present invention. Referring to FIG. 27, by densely arranging conductive regions 135 in the direction of the height 115, elements of the semiconductor device can be highly integrated.
Referring to FIG. 27 again, contact holes 136a and 136b are formed on conductive region 135 for making electrical contact with overlying interconnection lines and the like. Further, gate electrodes 118c to 118g are formed on the semiconductor substrate. The width W5 of conductive region 135 should be sufficiently large for generating contact holes 136a and 136b as well as gate electrodes 118f and 118g on conductive region 135.
In formation of conductive region 135, as shown in FIG. 28, a silicon nitride film (not shown) functioning as a protection film in thermal oxidation is deposited on a main surface of a semiconductor substrate 137, and a resist pattern 111a is then formed on a region which becomes conductive region 135 (see FIG. 271). FIG. 28 illustrates the resist pattern used for fabricating the semiconductor device shown in FIG. 27. Resist pattern 111a should have its height H5 smaller than the wavelength of exposure light and its width W5 which is sufficiently larger than the wavelength of the exposure light as described above.
However, a problem similar to that pointed out regarding the semiconductor device having contact holes 116a to 116f (see FIG. 21) arises. Specifically, when the conventional method of forming a resist pattern is employed to form such resist pattern 111a as shown in FIG. 28, a width W6 corresponding to the longer side of the resist pattern 111a becomes smaller than the width W5 of the resist pattern which is originally required as shown in FIG. 29. FIG. 29 illustrates the resist pattern where the shorter side is smaller than the wavelength of exposure light.
It is therefore difficult to form conductive region 135 as shown in FIG. 27, while achieving higher integration.
One object of the present invention is to provide a semiconductor device achieving higher integration without deteriorating electrical characteristics thereof.
Another object of the present invention is to provide a method of manufacturing a semiconductor device achieving higher integration without deteriorating electrical characteristics thereof.
Still another object of the present invention is to provide a method of forming a resist pattern used for the method of manufacturing a semiconductor device achieving higher integration without deteriorating electrical characteristics thereof.
Further object of the present invention is to provide an exposure system used for the method of manufacturing a semiconductor device achieving higher integration without deteriorating electrical characteristics thereof.
According to one aspect of the invention regarding a method of forming a resist pattern, light is directed via a mask onto a surface of a resist film formed on a substrate to project a first, optical image having a width which is equal to or less than the wavelength of the light onto the surface of the resist film. The mask is shifted relative to the substrate. Light is directed via the shifted mask onto the surface of the resist film to project a second optical image having a width which is equal to or less than the wavelength of the light onto the surface of the resist film such that the second optical image partially overlaps with a region where the first optical image is projected.
Accordingly, the shortest distance across an optical image which is finally produced by the first and second optical images can be made smaller than the wavelength of the light. Adjustment to direction and distance of the shift of the mask enables the longest distance of the optical image to be sufficiently greater than the wavelength of the light. A long and narrow resist pattern having a shortest distance smaller than the wavelength of light and a longest distance greater than the wavelength of light can precisely be generated, which is difficult if one exposure operation as employed by a conventional exposure process is applied. By use of such a long and narrow resist pattern, a semiconductor element structure such as a contact hole and a conductive region having a width smaller than the wavelength of light can be produced. As a result, higher integration of the semiconductor device is achieved.
By adjustment to the position and size of a portion where regions on which the first and second optical images are respectively projected overlap with each other, the dimension of the longest distance of the finally produce d resist, pattern can easily be adjusted. Accordingly, a resist pattern having a shortest distance smaller than the wavelength of light and a longest distance having an arbitrary dimension can be obtained.
By adjustment to direction and distance of the shift of the mask, not only the long and narrow resist pattern but a resist pattern having an arbitrary shape can be generated.
According to the one aspect of the invention described above regarding the method of forming a resist pattern, a step may be provided of developing the resist film to generate a resist pattern having a width equal to or less than the wavelength of light in regions where the first and second optical images are respectively projected and a region where the first and second optical images are projected overlapping with each other. The length of the resist pattern in a direction almost perpendicular to the direction of the width may be greater than the wavelength of light.
In this case, a resist pattern having a width (shortest distance) smaller than the wavelength of light and a length (longest distance) greater than the wavelength of light in a direction almost perpendicular to the direction of the width can be generated easily. If this resist pattern is used for forming a contact hole, for example, the degree of integration of semiconductor element structures such as the contact hole can be improved in the direction of the shortest distance of the resist pattern.
An interconnection line can be formed surely on a semiconductor element structure such as a contact hole generated by using the resist pattern, by making the semiconductor element structure into a long and narrow shape, even if the pattern position accuracy of the interconnection line formed to extend in a direction almost identical to the direction of the shortest distance is not satisfactory. Consequently, such a problem as defect of connection and disconnection of lines in a semiconductor device due to mismatch of the position of the semiconductor element structure and that of the interconnection line can be prevented Accordingly, deterioration of electrical characteristics of the semiconductor device caused by the such defect in connection can be avoided.
Prevention of deterioration of electrical characteristics as well as enhanced integration of the semiconductor device are thus possible.
According to the one aspect of the invention described above regarding the method of forming a resist pattern, the step of shifting the mask relative to the substrate may include a step of directing light onto the surface of the resist film via the mask while the mask is relatively shifted.
In this case, the method of forming a resist pattern of the invention is easily implemented particularly for an exposure system of the scan type.
According to the one aspect regarding the method of forming a resist pattern, the resist film may be the positive type.
According to the one aspect regarding the method of forming a resist pattern. the resist pattern may be a hole pattern.
According to the one aspect regarding the method of forming a resist pattern, the hole pattern may have a two-dimensional shape close to an ellipse.
In this case, a contact hole having an almost elliptical two-dimensional shape can easily be generated using the elliptical hole pattern. If the shortest distance across the contact hole is made smaller than the wavelength of light used for exposure, the degree of integration of contact holes can be enhanced in the direction of the shortest distance of the contact hole.
If the longest distance across the contact hole is made sufficiently greater than the wavelength of light, an interconnection line can be produced surely on the contact hole to extend in a direction almost perpendicular to the longest distance of the contact hole, even if the pattern position accuracy of the interconnection line is not satisfactory. Consequently, a problem such as electrically insufficient connection (defect of connection) via the contact hole between the interconnection line and a conductive region under the contact hole, due to mismatch of the positions of the contact hole and the interconnection line never occurs. It is thus possible to prevent deterioration of electrical characteristics of the semiconductor device due to such defective connection.
Accordingly, deterioration of electrical characteristics of the semiconductor device can be prevented and integration of the semiconductor device can be improved.
According to the one aspect regarding the method of forming a resist pattern, the resist film may be the negative type.
According to the one aspect regarding the method of forming a resist pattern, the resist pattern may be used for forming a conductive region.
According to the one aspect regarding the method of forming a resist pattern, the conductive region may have a two-dimensional shape which is almost rectangular.
In this case, a two-dimensionally rectangular conductive region having the shorter side and the longer side respectively smaller and greater than the wavelength of light. can be produced easily. Such conductive regions can be formed densely in the direction of the shorter side compared with the conventional device, and thus integration of the semiconductor device is easy.
Contact holes, interconnection lines functioning as electrodes, and the like may be formed on the conductive region. Even if the pattern position accuracy of the contact holes and the like is not satisfactory, the contact holes and interconnection lines can be produced surely on the conductive region since the longer side of the conductive region has a sufficient size which is longer than the wavelength of light. As a result, such a problem as connection defect in a circuit of the semiconductor device due to mismatch of the positions of the contact hole and the conductive region can be avoided. Accordingly, deterioration of electrical characteristics of the semiconductor device caused by the connection defect can be prevented.
Prevention of the deterioration of electrical characteristics as well as higher integration of the semiconductor device are thus achieved.
According to another aspect of the invention regarding a method of manufacturing a semiconductor device, the method of forming a resist pattern of the above-described one aspect is used.
In this case, using a resist pattern having a width (shortest distance) smaller than the wavelength of light and a length (longest distance) in a direction almost perpendicular to the direction of the width that is greater than the wavelength of light can be used for producing a semiconductor element structure such as a contact hole. Accordingly, in the direction of the shortest distance of the resist pattern, the degree of integration of semiconductor element structures such as contact holes can be enhanced.
Even if the pattern position accuracy of an interconnection line formed to extend in the direction almost identical to the direction of the shortest distance is not satisfactory, the interconnection line can be formed surely on the semiconductor element structure such as the contact hole generated by using this resist pattern, by forming the semiconductor element structure into a long and narrow shape. As a result, it is possible to prevent, a problem such as defective connection and disconnection of lines in the semiconductor device due to mismatch of the positions of the semiconductor element structure and the interconnection line. Accordingly, deterioration of electrical characteristics of the semiconductor device due to this defective connection or the like can be prevented.
Prevention of electrical characteristics as well as higher integration of a semiconductor device are thus possible.
According to still another aspect of the invention regarding an exposure system, the exposure system includes a substrate support member, a mask, and light-directing means. The substrate support member supports a substrate where a resist film is formed. The light-directing means direct light onto the resist film via the mask while shifting the mask relative to the substrate to project an optical image having a width equal to or less than the wavelength of light onto the resist film.
The exposure system of the invention can thus easily implement the method of forming a resist pattern according to the above one aspect of the invention.
According to a further aspect of the invention regarding a semiconductor device, the semiconductor device includes a semiconductor substrate and a coating film. The coating film is deposited on the semiconductor substrate and has a hole. The shortest distance across the hole is equal to or less than the wavelength of exposure light used in a photolithography process for making the hole. The longest distance across the hole is greater than the wavelength of the exposure light.
In the direction of the shortest distance, the number of holes can be increased compared with the conventional device since the shortest distance across the hole is smaller than the wavelength of exposure light. As a result, when the holes are utilized as contact holes or the like of the semiconductor device, the degree of integration of semiconductor element structures can be enhanced by the increased number of contact holes. Accordingly, the degree of integration of the semiconductor device can be improved.
When an interconnection line is formed on the hole to extend in a direction almost perpendicular to the longest distance of the hole, the interconnection line can be formed surely on the hole since the longest distance across the hole has a sufficient size which is greater than the wavelength of exposure light, even if the pattern position accuracy of the interconnection line is not satisfactory. As a result, defective connection of the interconnection line with a conductive region formed under the hole due to mismatch of positions of the hole and the interconnection line can be prevented. Deterioration of electrical characteristics of the semiconductor device due to defective connection can thus be prevented.
Prevention of deterioration of electrical characteristics and higher integration of the semiconductor device are accordingly possible.
According to the further aspect described above concerning the semiconductor device, the semiconductor device may further include an interconnection line formed on the hole to extend in a direction almost perpendicular to the longest distance of the hole. The coating film may be an insulating film, and the longest distance may be greater than the sum of the line width of the interconnection line and the length of the margin of the pattern position accuracy of the interconnection line.
In this case, even if the position of the interconnection line formed on the hole varies to some extent, the interconnection line can be formed to overlap the hole. Accordingly, electrical connection between the interconnection line and a conductive region formed under the hole can surely be made.
According to a still further aspect of the invention regarding a semiconductive device, the semiconductor device includes a semiconductor substrate and a conductive region. The conductive region is formed on the substrate. The shortest distance across a two-dimensional shape of the conductive region is equal to or less than the wavelength of exposure light used in a photolithography process for producing the conductive region. The longest distance across the two-dimensional shape is greater than the wavelength of the exposure light.
The shortest distance across the conductive region is thus smaller than the wavelength of exposure light, so that the number of the conductive regions in the direction of the shortest distance can be increased compared with the conventional semiconductor device including the conductive region with its shortest distance greater than the wavelength of exposure light. As a result, the degree of integration of the semiconductor device can be improved.
The longest distance across the conductive region is thus greater than the wavelength of exposure light, so that when a contact hole, an interconnection line, or the like is formed on the conductive region, the contact hole or the like can be formed surely on the conductive region. Consequently, a problem such as defective connection or disconnection of lines due to mismatch of the positions of the conductive region and the contact hole or the like can be prevented. Deterioration of electrical characteristics of the semiconductor device due to the defective connection or the like can be prevented accordingly.
Prevention of deterioration of electrical characteristics as well as higher integration of the semiconductor device are thus possible.
According to the still further aspect regarding the semiconductor device, the semiconductor device may include an interconnection line formed on the conductive region to extend in a direction almost perpendicular to the longest distance. The longest distance may be greater than the sum of the line width of the interconnection line and the length of the margin of pattern position accuracy of the interconnection line.
In this case, even if the position of the interconnection line varies, the interconnection lines can surely be formed on the conductive region. As a result, prevention of defective connection due to mismatch of the positions of the interconnection line and the conductive region in the semiconductor device is surely possible. Deterioration of electrical characteristics of the semiconductor device due to the defective connection can be prevented accordingly.
According to one further aspect of the invention regarding a semiconductor device, the semiconductor device includes a semiconductor substrate, and a coating film formed on the semiconductor substrate and having first and second holes. The shortest distance across the first and second holes each is equal to or smaller than the wavelength of the exposure light used in a photolithography process step for generating the first and second holes. The longest distance across the first and second holes each is greater than the wavelength of the exposure light. The distance between the first and second holes is equal to or less than the wavelength of the exposure light. In the photolithography process step for generating the first and second holes, an exposure step is performed by moving a mask having a pattern formed thereon for producing the first and second holes relatively to and in parallel with the semiconductor substrate.
In the direction of the shortest distance, the number of holes can be increased compared with the conventional device since the shortest distance across the hole is smaller than the wavelength of exposure light. The number of holes per unit area can further be increased since the distance between the first and second holes is equal to or smaller than the wavelength of the exposure light. As a result, when the holes are utilized as contact holes or the like of the semiconductor device, the degree of integration of semiconductor element structures can be enhanced by the increased number of contact holes. Accordingly, the degree of integration of the semiconductor device can be improved.
When an interconnection line is formed on the hole to extend in a direction almost perpendicular to the longest distance of the hole, the interconnection line can be formed surely on the hole since the longest distance across the hole has a sufficient size which is greater than the wavelength of exposure light, even if the pattern position accuracy of the interconnection line is not satisfactory. As a result, defective connection of the interconnection line with a conductive region formed under the hole due to mismatch of positions of the hole and the interconnection line can be prevented. Deterioration of electrical characteristics of the semiconductor device due to defective connection can thus be prevented.
Prevention of deterioration of electrical characteristics and higher integration of the semiconductor device are accordingly possible.
According to the one further aspect of the invention, the semiconductor device may further include an interconnection line formed on at least one of the first and second holes and extending in a direction almost perpendicular to the longest distance across the holes each. The coating film may be an insulating film, and the longest distance may be greater than the sum of the line width of the interconnection line and the length of the margin of the pattern position accuracy of the interconnection line.
In this case, even if the position of the interconnection line formed on the hole varies to some extent, the interconnection line can be formed to overlap the hole. Accordingly, electrical connection between the interconnection line and a conductive region formed under the hole can surely be made.
According to one still further aspect of the invention regarding a semiconductor device, the semiconductor device includes a semiconductor substrate, and first and second conductive regions formed on the semiconductor substrate. The shortest distance across the shape in plan view of the first and second conductive regions each is equal to or less than the wavelength of the exposure light used in a photolithography process step for generating the conductive regions. The longest distance across the shape in plan view of the first and second conductive regions each is greater than the wavelength of the exposure light. The distance between the first and second conductive regions is equal to or less than the wavelength of the exposure light. In the photolithography process step for generating the first and second conductive regions, a mask having a pattern formed thereon for producing the first and second conductive regions is moved relatively to and in parallel with the semiconductor substrate to implement an exposure step.
The shortest distance across the conductive regions each is thus smaller than the wavelength of the exposure light, so that the number of conductive regions per unit area in the direction of the shortest distance can be increased compared with the conventional semiconductor device. The number of conductive regions per unit area can further be increased since the distance between the first and second conductive regions is equal to or less than the wavelength of the exposure light. As a result, the degree of integration of the semiconductor device can be improved.
The longest distance across the conductive region is thus greater than the wavelength of exposure light, so that when a contact hole, an interconnection line, or the like is formed on the conductive region, the contact hole or the like can be formed surely on the conductive region. Consequently, a problem such as defective connection or disconnection of lines due to mismatch of the positions of the conductive region and the contact, hole or the like can be prevented. Deterioration of electrical characteristics of the semiconductor device due to the defective connection or the like can be prevented accordingly.
Prevention of deterioration of electrical characteristics as swell as higher integration of the semiconductor device are thus possible.
According to the one still further aspect of the invention, the semiconductor device may further include an interconnection line formed on at least one of the first and second conductive regions and extending in a direction almost perpendicular to the longest distance across the holes each, and the longest distance may be greater than the sum of the line width of the interconnection line and the length of the margin of pattern position accuracy of the interconnection line.
In this case, even if the position of the interconnection line varies, the interconnection lines can surely be formed on the conductive region. As a result, prevention of defective connection due to mismatch of the positions of the interconnection line and the conductive region in the semiconductor device is surely possible. Deterioration of electrical characteristics of the semiconductor device due to the defective connection can be prevented accordingly.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention while taken in conjunction with the accompanying drawings.